{"id":205113,"date":"2024-12-31T07:50:15","date_gmt":"2024-12-31T07:50:15","guid":{"rendered":"https:\/\/news.talkwithrattan.com\/index.php\/2024\/12\/31\/mediateks-upcoming-flagship-soc-could-offer-up-to-4ghz-peak-clock-speed\/"},"modified":"2024-12-31T07:50:15","modified_gmt":"2024-12-31T07:50:15","slug":"mediateks-upcoming-flagship-soc-could-offer-up-to-4ghz-peak-clock-speed","status":"publish","type":"post","link":"https:\/\/news.talkwithrattan.com\/index.php\/2024\/12\/31\/mediateks-upcoming-flagship-soc-could-offer-up-to-4ghz-peak-clock-speed\/","title":{"rendered":"MediaTek\u2019s Upcoming Flagship SoC Could Offer Up to 4GHz Peak Clock Speed"},"content":{"rendered":"
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MediaTek<\/a> launched Dimensity 9400 as its latest flagship-tier smartphone processor in October. A tipster suggests that its successor, dubbed Dimensity 9500, may debut with a change in the CPU architecture and core configuration compared to the current flagship SoC. The chipset is said to be built using TSMC’s<\/a> new 3nm fabrication process and could offer peak clock speeds of up to 4GHz. This development comes a week after the chipmaker introduced<\/a> the Dimensity 8400 processor globally, delivering an improvement of up to 41 percent over its predecessor.<\/p>\n

Tipster Digital Chat Station (translated from Chinese) shared details about the purported Dimensity 9500 SoC in a post<\/a> on the Chinese social media platform Weibo. As per the tipster, who has a good track record when it comes to providing information about unannounced smartphones and chipsets, MediaTek’s next-generation flagship mobile processor could have a new architecture comprising two prime cores and four performance cores.<\/p>\n

It is speculated to be equipped with two Cortex-X930 prime cores dubbed \u201cTravis\u201d and six Cortex-A730 “Gelas” performance cores. The cores are said to have a 2+6 configuration, similar to Qualcomm’s latest Snapdragon 8 Elite<\/a> SoC, ditching the efficiency cores in the process.<\/p>\n

The tipster further claims that Dimensity 9500 will be built using TSMC’s N3P process (3nm), compared to the N3E process used for the fabrication of the current flagship Dimensity 9400 SoC. It is said to result in a performance boost of about 5 percent while also offering a 5-10 percent better efficiency.<\/p>\n

The chipset is also tipped to use ARM’s Scalable Matrix Extension (SME) \u2014 an Instruction Set Architecture (ISA) extension, which can accelerate AI<\/a> and ML-based applications and provide enhanced support for matrix operations. It may improve the Dimensity 9500 chip’s multi-thread performance.<\/p>\n

MediaTek launched<\/a> the Dimensity 9400 SoC in October and its successor is also speculated to launch around the same time next year.<\/p>\n<\/div>\n

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